80286 Build #2 (Intel Basic System Configuration), Part 3
Updated: Dec 8, 2022
This is part three of my blog posts on my 286 basic system build. At this stage, PS/2 keyboard input, interrupts, and LCD output are working.
Part 1: 80286 Build #2 (Intel Basic System Configuration)
Part 2: 80286 Build #2 (Intel Basic System Configuration), Part 2
Since posting the video above, I have added an LM386 audio power amplifier to amplify the post beeps. This should also reduce any risk of overloading the PPI pin that was previously driving the speaker directly. The latest schematic (posted on this page) includes this update.
YouTuber @pvc had a really cool suggestion -- to overlap ROM and video RAM (VRAM) addresses, using ROM for read and VRAM for write. I think that is a great idea and will use that concept at some point in one of my systems. For the video card in this system, I plan to support writes to and reads from VRAM, which will require me to keep ROM and VRAM address spaces separate. My VRAM is 128 KB, of which 96 KB is required for 320x240. I will use the extra 32 KB for caching video sprites or as general RAM for the system. Thank you, @pvc!
YouTuber @vladyslavlupashevskyi5030 caught some issues with my RAM_OE logic. Based on the feedback, I updated my RAM_OE logic (show below). Thank you, @vladyslavlupashevskyi5030!
Episode #48: 286, SPI, and a 6522 VIA
Schematic as of 22 November 2022
PSoC Configuration as of 22 November 2022
Assembly Code as of 04 December 2022
x86/g1_20221204.asm at main · rehsd/x86 (github.com)
Continued: 80286 Build #2 (Intel Basic System Configuration), Part 4.