rehsdMar 44 minSoftwareUsing GAL22V10 Programmable Logic DevicesI have recently started using programmable logic devices (PLDs) in some of my projects. Below are the steps I am using, along with some...
rehsdDec 21, 20213 minFPGAFPGA VGA for 6502 : First RunI've made some decent progress getting my FPGA VGA working on my 6502 system. My goal is to have a "smart display" to replace the current...
rehsdDec 20, 20211 minFPGACmod A7 FPGA : Video Test Pattern GeneratorBelow is the configuration I used to get the Xilinx Video Test Pattern Generator (TPG) working on a Digilent Cmod A7 FPGA. This is based...
rehsdDec 18, 20212 minFPGAVGA from Cmod A7 WorkingUpdate: I have it working. See postscript at the bottom of this post. I am attempting to get the Arty Pmod VGA Demo running on a Digilent...
rehsdDec 18, 20211 min6502Prepping My 6502 System for FPGA VGAI made some updates to my 6502 system to get it ready for my FPGA VGA. Previously, my USB mouse took ten VIA pins (a bit of laziness on...
rehsdDec 16, 20212 minFPGAFPGA VGA for 6502 System - Initial PrototypingI am currently working on building an improved VGA circuit for my 6502 build. My goal is to offload the video processing and have better...
rehsdDec 14, 20215 minFPGAArty VGA WalkthroughIf you are looking to add the VGA Pmod to your Arty A7 and control output from MicroBlaze, the following are the steps I have taken to...
rehsdDec 11, 20211 minFPGAArty VGA Output from MicroBlazeContinuing from my post FPGA VGA for 6502: Brainstorming... I am trying to find a decent solution to control VGA output from MicroBlaze....
rehsdDec 9, 20213 minFPGAFPGA VGA for 6502: BrainstormingI am currently brainstorming ways to add an FPGA-based VGA circuit to one of my 6502 builds. And... I have questions. :) As part of my...
rehsdDec 8, 20211 minFPGAVHDL 8-bit CPU - Runtime RAM UpdatesI have added UART support to my VHDL 8-bit CPU, along with a Windows application that allows retrieving and setting RAM values at...
rehsdDec 1, 20212 minFPGATroubleshooting a MicroBlaze UARTI am trying to determine why I am unable to communicate out through a UART on my Arty A7-100T. Any suggestions on how to troubleshoot...
rehsdNov 27, 20212 minFPGAVHDL 8-Bit CPU (Ben Eater edition) Working!As a continuation of FPGA VHDL Implementation of Ben Eater's 8-bit CPU - Progress Update, here's another update on my 8-bit CPU in VHDL...
rehsdNov 20, 20211 minFPGAFPGA VHDL Implementation of Ben Eater's 8-bit CPU - Progress UpdateI've been working on a VHDL implementation of Ben Eater's 8-bit CPU. I have VHDL modules built for the clock, registers, bus, RAM, ROM,...
rehsdNov 18, 20212 minFPGAConnecting VHDL to MicroBlazeContinuing my project of building Ben Eater's 8-bit CPU on an FPGA, I created the clock module in VHDL. I connected that VHDL to a...
rehsdNov 11, 20214 minFPGAArty A7 & OLEDrgb Pmod WalkthroughMy first attempt at getting Digilent's OLEDrgb Pmod working with an Arty A7 was unsuccessful. After a fair amount of troubleshooting and...
rehsdNov 9, 20213 minFPGAArty A7 & OLEDrgb Pmod StrugglesUpdate: I have the OLEDrgb display working! See bottom of post. Original Post First things first... I am new to FPGA development. I am...
rehsdOct 24, 20212 minFPGACaution: Steep Learning Curve Ahead (for me)For a while now, I've wanted to dig into field-programmable gate arrays (FPGAs). Today, u/Enlightenment777 provided the kick I needed to...