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  • Writer's picturerehsd

VGA Next: 640x480 ISA Card

Updated: Feb 4, 2023

One of my goals for my 286 system is to run MS-DOS at some point (ideally, 6.22). To get to that stage, I have some heavy lifting to do. Things that quickly come to mind: lots of BIOS assembly work, protected virtual-address mode support, floppy and/or hard drive (i.e., storage) support, and video output that supports 640x480. My current video card running in my 286 system supports 320x240 with 8 bits per pixel for color data. See VGA for my 80286. This card utilizes dual-port static RAM, which I love; however, for me to support a higher resolution, I will need much more RAM, and dual-port static RAM at larger capacities is out of by budget.


Design Goals

I am researching approaches to support the following design goals.

  • Resolution of 640x480. My current card supports 320x240.

  • 8 bits per pixel color data (or possibly 16 bpp). My current card supports 8 bpp.

  • 16-bit data access on ISA bus (i.e., high/low bytes from 286).

  • At least two full video pages (frame buffer) -- one for current VGA output and another to pre-render content prior to swapping out the previously-active page. Depending on the design, possibly support for three full video pages.

  • Decoupled video output from the 286 system bus and clock, where memory writes from the 286 and memory reads for video output are independent -- without the use of dual-port RAM. I do not want the video output processing to take the bus control from the CPU. I am currently supporting this decoupling through the use of dual-port RAM.

  • Given the above, total potential video memory in the range of 640 KB (640 x 480 x 8bpp x 2 pages) to 2 MB (640 x 480 x 16bpp x 3 pages).

  • Potentially, add a hardware character generator.

Unorganized Thoughts / Questions / References

  • Recommendations for books (or other resources) on designing video cards of this era (late 1980's into the 1990's)? I have started working through some of the resources below.

  • How can I create the decoupled capability of dual-port RAM with single-port RAM?

    • I could be writing to one page while the output is reading from a different page, if I separate the pages across different physical RAM ICs. Decode logic of some sort could enable / disable different ICs depending on which video page is active. This would also allow instant switching of output from one frame to another.

    • Could I do something with clock phases or qualifying the 286 or pixel clocks to allow interleaved access to single-page RAM from both the 286 and the VGA output?

    • ...

  • While I could create an FPGA-based solution for this, my initial thought it to find a different approach.

  • Hardware tilemap / text mode?

  • Hardware scrolling?

  • Leverage a pair of 32K dual-port SRAMs (since I have them) as a 64K segment buffer between the 286 and the VRAM.

  • ...


Brainstorming Document


First thoughts (1 Jan 2023):

Brainstorming VGA 640x480
.pdf
Download PDF • 204KB

Updated:

Brainstorming VGA 640x480 _v2
.pdf
Download PDF • 206KB




After posting the above video (Schematic Started), LiqvidNyquist pointed out a major oversight on my part. I added an additional set of multiplexers on the address input to the VRAM and an additional set of transceivers between the VRAM data and the 286. This will support giving full control of one frame to the 286 and the other frame to the VGA output. The schematic file below has been updated accordingly.





















Latest Schematic & PSOC Configurations

VGA 20230204
.pdf
Download PDF • 1.02MB



To Do

  • Switch to using the stack for passing parameters, instead of global variables.

  • Start to implement BIOS interrupt call support so that DOS or C applications can utilize the graphics hardware.

  • Add a second set of counters to support contiguous memory addressing. Thanks to Kevin Leadbeater for the suggestion!

  • Possibly use 64KB of dual-port RAM for the 286-to-VRAM 64KB window interface. Thanks to MeMad Max for the suggestion!

  • Improved output control, allowing setting of output memory address within overall memory space (which could potentially be much larger than the current 0.5MB + 0.5MB. Thanks to Will Sowerbutts for the suggestion!

  • VESA Support (further down in my backlog).

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