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16-bit Processor Build - Initial Assembly

Updated: Sep 4, 2022

I have started the hardware build of my 16-bit processor. In this running post, I will share progress updates and lessons learned as I go.

29 July 2022 - Dual-bus board, Clock/reset card, Bus-to-breadboard extension

My first task is to get the dual-bus board running, along with the clock/reset card. Additionally, I have a pair of PCBs that allow me to easily extend the bus out to breadboards. In the following video, I compress 2.5 hours of build time to approximately 4.5 minutes.

  • I populate some of the bus-board -- enough to connect two cards to the 16-bit processor bus.

  • I then build the first add-in card for the 16-bit processor, a clock and reset card. The card generates CLK, CLK#, and RESB signals. The clock can be driven from an onboard 555 or onboard full can oscillator. Manual clock pulsing is also supported. The card supports remotely controlling the reset and clock pulse, which I have connected to a set of switches on the bus board (through a pair of 2-pin headers). Both the card and bus board have LED indicators. The bus board reads the clock and RESB signals from the 16-bit bus.

  • Finally, I build a pair of PCBs for extending the bus to a breadboard and test reading the clock signal on the breadboard.

  • On the dual-bus board, my column of supplemental power connectors (right edge of board) was missing the GND connection in the schematic. I must have accidentally deleted it along the way. I updated the schematic and ran a bodge wire on the backside of the board to connect the column's GND to the DC barrel connector's GND using 20-gauge wire.

  • On the dual-bus board, I accidentally installed the RESB indicator LED backwards.

  • On the bus extension PCBs, there are two unused pins (only 98 pins needed for the ISA slot). On the extension PCB that is inserted into the ISA slot, the far-left pair of ribbon connections is not connected. On the breadboard adapter, the far two right pins were unused (instead of the far-left pins) -- at least when looking at the PCB when the silkscreen text is upright. Fix one: rotate the PCB 180 degrees (upside-down text). Fix two: connect the two unconnected pins. I have updated the schematic to connect all 100 pins so that orientation will not matter.

  • On the bus extension PCBs, the two 50-pin ribbon connectors are a bit too close to each other. I had to slightly sand down the ribbon connectors to best fit. I have updated the PCBs to widen the gap between the connectors.

7 August 2022 - Simple Bus Testing Circuits

JLCPCB ended up having to re-run my latest PCB order due to production issues on their end (scratched PCBs). This has delayed me getting the cards for counters, instruction register, reset status, and control.

So, while I am waiting, I built a simple pair of circuits to help with testing the bus and registers -- one for setting values on the bus and one for reading from the bus. For setting values, I am using the same bus transceivers as the rest of my system and have a switch in the circuit that enable or disables output of the transceivers. I am using LED bar graphs to display values being written to the bus (or read from the bus). Both circuits have simple pin headers for connecting to the system's bus and power. I have a feeling these will come in handy.

12 August 2022 - Counter and Control Cards

I have the initial PCB build complete for the counter and control cards.

  • During assembly, I inserted one of the ICs backwards. This caused my power supply to go into over current protection when powering up the system. I corrected the IC placement and the system powered up fine.

  • Initially, I was not getting counter output. I tracked this back to lack of control signals (the control card was not built / installed at the time) causing an inverter on the counter card to have floating inputs for two signals needed to enable the counters. I manually pulled signals high/low appropriately to get the counters running. I may update the design to include pull-up or pull-down resistors as needed; however, this should not be an issue once the control card is fully running.

  • I am waiting for some parts: 74LS279 for the reset status circuit; AT28HC256-70PI EEPROMs for the control card.

14 August 2022 - Signs of Life

I updated the counter card to have the instruction step increment on the CLK fall instead of rise. I also completed the initialization circuit on the counter card and added an LED to show when the system is initializing. During initialization, the initialization ROM will be used. Once initialization is complete, the primary ROM is used. (The ROM card is not built yet.) This swapping of ROMs will be used to support the reset vector. I also attached the ribbon cable between the (microcode) control card and the counter card. I am seeing signs of life.🙂

I also did some quick testing of clock speeds. In the following video, I state that it the systems runs at 10 MHz. CORRECTION: I failed to recall that I am running the full can oscillator through a 7474 flip-flop, which halves the oscillator speed. 🙄 This means that my previous tests were using 5 MHz and 6 MHz for CLK, with 5 MHz passing and 6 MHz failing. See details below the following video.

System Speeds

When the system failed at 6 MHz in the video, the symptom that I saw was that the fourth synchronous binary counter in the 16-bit program counter was failing. I thought this was related to propagation delay of the counter ICs (which is incorrect). I swapped out the original counters (SN74HC161N) with SN74F163AN (I do not have any faster 161's). This resulted in success at 6 MHz. After further troubleshooting and tweaking, I have the current build running a CLK of 24 MHz (successfully)!! This is with a 48 MHz oscillator. The next step up for an oscillator I have is 60 MHz, and the system fails trying to run a 30 MHz CLK. 😂 The additional change that I made was to pull out the AT28HC256F-70PI EEPROM and replace it with an AT28C256E-15PU EEPROM. So, the slower EEPROM works. I am still trying to figure out why the faster EEPROMs fail. (If you know, please let me know. 😁) Comparing the EEPROMs, the input/output low/high voltages are the same. The AT28HC is twice as fast as the AT28C when it comes to AC read characteristics. By the way, I have no expectation of the final system running this fast!

Update: I changed my program counter ICs to 74F161AN and changed the circuit from ripple mode carry to carry-look-ahead. Details on these configurations can be found in this datasheet (thanks, u/DockLazy, for the info!). I was still

mentally stuck on why the two different EEPROMs resulted in such different behavior. Measuring the output voltage on the EEPROM I/O pins, I noticed the output voltage was slightly higher on the slower EEPROM. With the help of my bus-to-breadboard card, I added a 3.3K pull-up resistor to each of the two output control lines needed for program counter enable and output. With this change, the faster EEPROM worked! I put in a 60 MHz oscillator, and the system is running successfully at 30 MHz. Everything seems to be working at this speed. Again, this speed will not hold up, but I find it quite interesting that it is working right now at 30 MHz. Crazy...

17 August 2022 - Bus Termination, Updated Bus-to-Breadboard, Bus Debug Board

In the following video, I build a few new, simple PCBs and attempt surface mount soldering for the first time (TSSOP-48).

The bus termination card will let me experiment with different bus terminations for the 16-bit processor bus and also provides a port for an LED bar graph module to display the values on the bus. Bus extension ports are also included on this PCB.

The updated bus extension card is much easier to work with when extending the bus to breadboards.

The bus debug card allows me to write to the bus and read from a bus. The push button controls the output enable of the 16-bit transceiver (74ABT16245), similar to the transceivers used in the 16-bit processor. Dip switches are used to set the value to write to the bus. In the video, I loop the output back to the input for quick testing. The card was also an opportunity for me to try surface mount soldering. While I have plenty of surface mount soldering practice to do, I am happy that my first attempt succeeded. 🙂

24 August, 2022 - ROM, RAM, Address Decode, Registers A & X, External Bus Bridge

Part one of two: assembly.

  • The design to support my reset vector was a bit off, and I noticed this after ordering the ROM/RAM PCBs. This caused me to make adjustments to the PCB with trace cuts and bodge wire.

  • For trace cutting, I tried both a Dremel and X-ACTO knives. While these worked for cutting traces, they were more difficult than they should have been. I have since ordered a grinding pen with finer tips that should make future trace cutting easier. For bodge wires, I am using 28 AWG enameled copper wire. The enameled wire stripper is very helpful.

  • I designed the primary ROMs to be on the backside of the ROM/RAM card to minimize used space on the 16-bit bus and enable easier access from the external bus side of the system. This added some mental hurdles when working with the card (e.g., bodge wiring) since the pins are in order from the bottom-side perspective (i.e., mirrored from the top-side perspective).

  • Somehow, I did not space out the debug headers on the bus bridge card. 🙄 I am not sure how I missed this. For now, I will just use a pair of these cards -- one to display external ADDR data and another to display external DATA. I will also use a third card to connect to an Arduino logger. A future version of this card will space out the headers and add secondary connections for an Arduino logger.

  • I had four data lines out of the initialization LSB and primary LSB EEPROMs backwards.

26 August, 2022 - ROM, Decode Programming

I have the first pass of programming for the initialization EEPROMs, primary EEPROMs, and address decode PLD.

27 August, 2022 - First Code Running!

While I see plenty of issues with the running system, this is a pretty good milestone for the project -- the first code running on the system! The initialization ROMs, vector lookup and jump, and primary ROMs all appear to be working. I think I have some timing-related issues, but I will dig into that in the weeks to come.

28 August, 2022

I have done a little tuning of my microcode (i.e., control signals) and things are looking better. My microcode had some optimizations for the FPGA version of my 16-bit processor. Some of those optimizations were causing issues on this hardware build.

I have extended the bus board by connecting a second board to the first with a pair of extension cards. I have also added two more dual-register cards. I am using register A so far, but I also have registers available for X, Y, I, J, and the stack pointer. I have an updated ROM/RAM/Decode card coming, along with a pair of cards that will handle shifting, rotating, ANDing, ORing, adding, subtracting, and settings flags for carry and zero.

3 September, 2022

I have an Arduino now connected to support debugging.

After digging into the oddness with a couple of the registers and the incorrect memory input (i.e., write) for some ROM calls, I tracked down a few bugs in my processor microcode (on the Control card). Things are looking pretty good now.

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