As I have now found some nice stability with my 65816 system running at 14.16 MHz, I thought I would come back to bus resistors and see if I can tell a difference with, without, and with a few different values of resistance on the bus.
Best Results: concurrent 1K pull-up and pull-down* resistors on address and bus lines. This allows me to run at 14 MHz with both my video card and sound card installed.
*My understanding is that this concurrent pull up and pull down configuration is a form of Thevenin termination. See Termination for Advanced CMOS Logic (ON Semiconductor) and Termination Techniques for High-Speed Buses (EDN).
At 14 MHz, here are sample data, address, and bank signals, using the configuration from Best Results above:
I'm sure these signals could be improved, but they seem to be working well. If anyone has pointers on how to further improve them, especially the far left data signal, I would appreciate it.
On my system board, I have a pair of resistor networks on the data, address, and bank signals on the bus. I also have a pair of resistor networks on the bank/address signals between the 65816 and the 74573 and 74245. I installed pin headers and jumpers so that I can easily change (or remove) the resistance and choose whether the resistor network is pulling up (to VCC) or down (to GND). The right image below matches my current optimal configuration, with 1K resistor networks -- one to VCC and one to GND for each of the data, address, and bank signals.
Just before finding the optimal configuration (so far), I was using 10K resistor networks instead of 1K. I have found the 1K to perform better.
No Resistors - Fails at 14 MHz
No Resistors - Works at 12.5 MHz
Thevenin termination with 1K SIPs - Works at 14 MHz
Testing was done with the ISA extension and sound card (and video card) installed in all three cases. The ISA extension is disconnected below to get capture a better picture.
I swapped out the 1K SIPs for 3.3K SIPs. The 1K SIPs appear to perform better in my build.