I've made some decent progress getting my FPGA VGA working on my 6502 system. My goal is to have a "smart display" to replace the current low-resolution VGA circuit. See my previous blog posts for more details.
For the current design, I am running 800x600 at 60 Hz. The FPGA I'm using in this design can support up to 1080p comfortably, but I really don't have a need for that much resolution, and it slows down rendering. I am controlling the VGA output with 7-bit commands, accompanied by 8 bits of data, and an interrupt signal -- all coming from the VIA on the 6502 system. The FPGA is setup to manage incoming data in an event-driven model (i.e., not polling). Signals from the VIA are shifted from 5V to 3.3V before going into the FPGA. The screen is controlled with simple commands for printing text, drawing pixels, filling shapes, etc. The 6502 only needs to know what to draw and its coordinates; it does not need to deal with memory addresses on the VGA circuit.
Initial Observations
I have some 6502 assembly code work to do. First, I see some timing-related issues. Second, I can pull out much of the former VGA code (which is still running and working on the unconnected VGA port on the left of the 6502 PCB).
I will need to improve the smoothness of the mouse. For now, I just have it moving several pixels at once, instead of one pixel at a time. I might leave it this way but compensate in code to fill is missing pixels when drawing (e.g., when drawing lines).
I haven't yet implemented the logic to put a pixel back to it's original color when dragging the cursor over it. You'll notice in the video that when I draw the cursor over stuff, it leaves a trail of black pixels. I have this code in 6502 assembly and just need to port it over to MicroBlaze C.
Next Steps
I have a lot of code cleanup and some refactoring to do. My first goal was to get something working. Now, I need to improve the safety and readability of the code.
Utilize multiple frame buffers and test out some animated content. Currently, I am using a single frame buffer for all output.
I'm going to experiment loading bitmap graphics. I have something thoughts on how I might do this, but I need to test a few things.
Learn about sprites and do some experimenting!
I think I will populate another 6502 PCB (I have a few left) and leave out the original Eater VGA circuit. I can then hopefully get back those clock cycles used to drive the old Eater VGA.
I need to find a better physical arrangement so that the FGPA and associated connections are solidly affixed and won't come loose when moving the system around.
I've been experimenting with a breadboardable Cmod A7, hoping to have a similar output capability. Unfortunately, the Cmod A7 only has 512KB of RAM and likely won't work out. I am researching other small, breadboardable FPGAs that might work.
I am going to port the solution to an Arty Z7 SoC. This will give me an opportunity to learn a bit about Zynq and try the HDMI output. I will likely run 720p or 1080p for this.
I'm considering adding a return data path from the FPGA back to the 6502. This would allow me to read graphics data back. This lets me leverage the "video RAM" on the FPGA and access it in chunks on the 6502.
Ok, that's enough to keep me busy for a long time... :)